EMAC_MIIADDR_CR=EMAC_MIIADDR_CR_60_100
Ethernet MAC MII Address
| EMAC_MIIADDR_MIIB | MII Busy |
| EMAC_MIIADDR_MIIW | MII Write |
| EMAC_MIIADDR_CR | Clock Reference Frequency Selection 0 (EMAC_MIIADDR_CR_60_100): The frequency of the System Clock is 60 to 100 MHz providing a MDIO clock of SYSCLK/42 1 (EMAC_MIIADDR_CR_100_150): The frequency of the System Clock is 100 to 150 MHz providing a MDIO clock of SYSCLK/62 2 (EMAC_MIIADDR_CR_20_35): The frequency of the System Clock is 20-35 MHz providing a MDIO clock of System Clock/16 3 (EMAC_MIIADDR_CR_35_60): The frequency of the System Clock is 35 to 60 MHz providing a MDIO clock of System Clock/26 |
| EMAC_MIIADDR_MII | MII Register |
| EMAC_MIIADDR_PLA | Physical Layer Address |